1. Field of the Invention
The present invention relates to an integrated circuit device and a manufacturing method thereof.
2. Description of the Related Art
In recent years, an element and an integrated circuit over a glass substrate are developed actively for using of a display such as an LCD, an organic EL, a photo sensor, a solar battery, or a photoelectric conversion element. Meanwhile, in an element and an integrated circuit using a Si wafer, miniaturization and thinning of an IC chip are advanced for use of a mobile phone. On either glass or a Si wafer, miniaturization and thinning are needed strongly. In addition, a semiconductor device which transmits and receives data (IC chip) has been developed actively. Such a semiconductor device (IC chip) is referred to as an RF tag, a wireless tag, an electronic tag, a wireless processor, a wireless memory, or the like (for example, see Reference 1: Japanese Patent Laid-Open No. 2004-282050). An IC chip using a silicon substrate is mainly in practical use, and a display or the like using a glass substrate is mainly in practical use, and thinning of a substrate is required.
In addition, as well as being thinner, a flexible device such as an RFID embedded in a paper, a display which can be wrapped around onto a pen, a forming sensor for a three-dimensional shape or a color sensor, a hand roll PC, or clothes in which the design is changed by changing the color. Therefore, thinning is an important key.
When an element is formed by using a substrate which is made thinner from the start, a substrate cassette becomes huge in height direction, and footprint of a device or a substrate is increased when warpage of a substrate is considered. In addition, difficulty of handling, warpage by stress, or displacement in a process such as lithography or printing becomes a problem. Therefore, a method in which an element is manufactured and then a substrate is made thinner is used.
About thinning a substrate using grinding or polishing, planarity of the substrate is improved using by a polishing process using abrasive grains after grinding using abrasive grains, a film has been formed to be thinner. An abrasive grains having a lower Vickers hardness than a substrate to be polished tend to be used for an artifice for increasing an evenness property. For example, cerium oxide (CeO2) is used to a glass substrate or silicon oxide (SiO2) is used for a silicon wafer, or the like, and cerium oxide and silicon oxide have lower Vickers hardness than a substrate; however, only a portion which is attached firmly to an object by chemical reaction can be polished selectively (see Reference 1: Japanese Patent Laid-Open No. 2004-282050). Note that, here, the hardness is compared by using Vickers hardness; however, the hardness is sometimes shown in a method other than Vickers hardness (Brinell hardness, Rockwell hardness, Knoop hardness, or the like).
In addition, there is a technique in which a glass substrate is removed by wet etching by chemical reaction (see Reference 2: Japanese Patent Laid-Open No. 2002-87844).
In addition, there is a technique in which an element formed over a substrate is physically peeled from the substrate and transferred to another substrate by controlling adhesion of a peeling layer formed under an element (see Reference 3: Japanese Patent Laid-Open No. 2004-214281).
When, in a semiconductor device such as an IC chip having an integrated circuit device, a substrate over which an element is formed is made thinly by grinding and polishing, there is a limit of thinning by a limit of accuracy of a device and in-plane uniformity of polishing; therefore, it has been difficult to make the entire surface have thickness of 50 μm or less.
When warpage of in-plane of a substrate is considered, it is necessary that a substrate is divided and made a small planar dimension, and warpage of in-plane is reduced and processed in order to make a substrate thinner with high yield, and it is a factor of throughput degradation and cost increase. Therefore, even when a multiplicity of samples in which a minimum of a substrate residual film in a whole surface is more than 50 μm in thickness is obtained, a minimum of a substrate residual film in a whole surface becomes 50 μm more (100 μm or 200 μm) when improving yield on a mass production is considered.
When a substrate in which an element is formed is made thinner by wet etching using a chemical solution, it has been very difficult to make a substrate thinly to a thickness of 50 μm or less with high uniformity and high yield since there is a limit of thinning due to variation caused in the etching rate of in-plane at a time of etching using a chemical solution.
When a substrate is removed by a method using etching by chemical reaction of Reference 2, it has been be a great limit that heat treatment at a temperature higher than a temperature of an allowable temperature of an etching stopper layer formed under an element cannot be performed.
When an element is separated from a substrate and is transposed to another substrate by a method using controlling of adhesion in Reference 3, there is a problem that a capacitance is generated between a separation layer and an element and a properties before separating (in particular, a high frequency property) is not evaluated accurately.
In addition, it is an advantage of this technique that a separation property can be controlled by heating; however, there is a demand for heat treatment at a more temperature at which a separation layer is separated in a process or more.
In addition, in References 2 and 3, when heat process (laser crystallization, laser activation, or the like) with visible light is performed, the process margin has been reduced by optical reflection or heat absorption in an etching stopper layer or a separation layer.
In References 2 and 3, when a substrate which is transparent to light is used, self alignment by back light exposure is not able to be performed in a conductive separation layer.